The semiconductor device market often demands products that scale in some dimension (for example, the number of Flash channels on a Flash controller or the number of lanes on a PCIe switch). In some types of products, the architecture is such that it is possible to scale the product by electrically interconnecting two or more neighbor devices on a wafer and then dicing the wafer to obtain dies that comprise the interconnected neighbor devices. The interconnected neighbor devices perform as a scaled single device.
Advanced wafer processes that use, for example, low dielectric constant materials often require seal ring structures surrounding each individual device to ensure that cracks, generated when dicing a processed wafer into individual devices, do not propagate into the device's active region. The presence of such seal rings makes it difficult to electrically interconnect neighbor devices.
Therefore, improvements are desirable.